view socs/Atheros/AR9132/soc.hints @ 216:3ba90da7df57

Add new chip Atheros/AR9132 Submited by: [email protected]
author ray@terran.dlink.ua
date Tue, 18 Oct 2011 20:41:04 +0300
parents
children 0810ffaa53d3
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# Atheros APB bus
hint.apb.0.at="nexus0"
hint.apb.0.irq=4

# uart0
hint.uart.0.at="apb0"
# see atheros/uart_cpu_ar71xx.c why +3
hint.uart.0.maddr=0x18020003
hint.uart.0.msize=0x18
hint.uart.0.irq=3

# ehci
hint.ehci.0.at="nexus0"
hint.ehci.0.maddr=0x1b000100
hint.ehci.0.msize=0x00ffff00
hint.ehci.0.irq=1

# ar71xx_spi
hint.spi.0.at="nexus0"
hint.spi.0.maddr=0x1f000000
hint.spi.0.msize=0x10

# SPI flash
hint.mx25l.0.at="spibus0"
hint.mx25l.0.cs=0

# Watchdog
hint.ar71xx_wdog.0.at="nexus0"

# GPIO controller
hint.gpio.0.at="apb0"
hint.gpio.0.maddr=0x18040000
hint.gpio.0.msize=0x1000
hint.gpio.0.irq=2